Community chip creation platform Efabless has launched chipIgnite, a program enabling low-cost fabrication of initial prototypes of intellectual property (IP) blocks or full systems on chip (SoCs). The initiative is designed to bring chip design and manufacturing to the masses, in collaboration with Skywater Technology whose open source 130 nm CMOS platform will be used to manufacture the chips.
The program includes a pre-designed carrier chip and automated open-source design flow from Efabless, using SkyWater’s open source SKY130 process. The value of the program is not just low-cost manufacturing, but also a development board and firmware stack to simplify design validation and test. All projects created as part of the chipIgnite program will utilize a full chip reference design template that implements the physical I/O for the chip as well as providing a common management area to support test and evaluation of the user’s design. The program also includes an optional automated open-source design flow for implementing projects that enables users to generate layouts for their digital projects from RTL. The chipIgnite program will provide users a guaranteed reservation to ensure their project is included.
SkyWater’s open source 130 nm CMOS platform will be used to fabricate chips for the chipIgnite program. The automotive-grade mixed-signal platform is suited to internet of things (IoT) and edge computing as it enables a combination of both digital and analog circuit performance with embedded non-volatile memory for a wide range of SoC architectures. The program provides users 10 mm2 of total project area with fabrication for projects using the SkyWater Open Source PDK.
The chipIgnite program builds on an active community of 1500+ users for the Open PDK initiative where new designers can get support and access to resources through community messaging platforms such as Slack. In addition to using freely available design flows based on open-source EDA tools, designers can also employ proprietary design tools for creating their designs, allowing them to address design requirements not supported by open source tools.
The program is a good fit for users who want to create an initial prototype or proof-of-concept for an IP block or full SoC. The starting price of $9750 per project includes 100 QFN or 300 WCSP packaged parts and five evaluation boards. The chipIgnite shuttles also support users who are distributing initial boards or launching a pilot for their product. An option for 1000 WCSP parts at $20 each is available that enables the service to be used for early product builds.
The first manufacturing run in the chipIgnite program is optimized for university digital and mixed-signal chip design courses with a submission deadline for tapeout of June 18, 2021. The delivery of parts and assembled boards is planned for early October.
The first shuttle in the chipIgnite program will support fabrication of student projects as part of the EE272B course in the electrical engineering department at Stanford University for senior undergraduate and graduate students.
The new program also has industry support from organizations including QuickLogic and the CHIPS Alliance. “QuickLogic joins Efabless and SkyWater in fully supporting open-source initiatives,” said Brian Faith, CEO of QuickLogic. “The new chipIgnite program is a great way for innovators to create customized devices quickly and cost effectively.”
“CHIPS Alliance is a major champion of open-source hardware design and associated design automation tools. I am excited to see the chipIgnite program offered by Efabless to include many different collaborative IP developers to prove new ideas. The platform alleviates the barriers to entry into chip design and allows for ready exploration of many concepts,” said Rob Mains, general manager of CHIPS Alliance.
Details about the chipIgnite program can be found here.
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